Cypress AN2131Q USB 1.1 chip 8051 compatible P0, P1, and P2 ports 32 Kbytes RAM External to D0~D7 data bus and A0~A15 address bus 8051 connection slot, 40-pin compatible Firmware downloadable via USB interface. I2C suitable control signal Provides debugging and development environment (Keil C Compiler) Supports Windows 98/ME/2000/XP
Cypress AN2131Q USB 1.1 chip 8051 compatible P0, P1, and P2 ports 32 Kbytes RAM External to D0~D7 data bus and A0~A15 address bus 8051 connection slot, 40-pin compatible Firmware downloadable via USB
Cypress CY7C64613-128NC FX USB 1.1 chip, 12Mbps full speed transmission 8051 compatible P0, P1, P2, and P3 Ports 64K RAM D0-D7 data bus and A0-A15 data address 40-pin connection to compatible 8052 si
Cypress CY7C64613-128NC FX USB 1.1 chip, 12Mbps full speed transmission 8051 compatible P0, P1, P2, and P3 Ports 64K RAM D0-D7 data bus and A0-A15 data address 40-pin connection to compatible 8052 si
Cypress CY7C64613-128NC FX USB 1.1 chip, 12Mbps full speed transmission 8051 compatible P0, P1, P2, and P3 Ports 64K RAM D0-D7 data bus and A0-A15 data address 40-pin connection to compatible 8052 si
Cypress CY7C64613-128N USB1.1 with 8051 Core 128K RAM P0, P1, P2 and P3 Ports 24 LED display function circuit. 4 sets of 7-segment display function circuit Provides I/O address control Display: 20x2
Cypress CY7C64613-128N USB1.1 with 8051 Core 128K RAM P0, P1, P2 and P3 Ports 24 LED display function circuit. 4 sets of 7-segment display function circuit Provides I/O address control Display: 20x2
Cypress CY7C64613-128N USB1.1 with 8051 Core 128K RAM P0, P1, P2 and P3 Ports 24 LED display function circuit. 4 sets of 7-segment display function circuit Provides I/O address control Display: 20x2
Cypress CY7C64613-128NC USB 1.1 chip P0, P1, P2 and P3 Ports 32K RAM D0-D7 data bus, A8-A11 data address, and 3 data address enable cables 40-pin connection to an external 8051, simulated 8051 I/O co
Cypress CY7C64613-128NC USB 1.1 chip P0, P1, P2 and P3 Ports 32K RAM D0-D7 data bus, A8-A11 data address, and 3 data address enable cables 40-pin connection to an external 8051, simulated 8051 I/O co